# cxl-enable-port(1) ## NAME cxl-enable-port - activate / hot-add a given CXL port ## SYNOPSIS cxl disable-port \ \[\..\] \[\] A port typically autoenables at initial device discovery. However, if it was manually disabled this command can trigger the kernel to activate it again. This involves detecting the state of the HDM (Host Managed Device Memory) Decoders and validating that CXL.mem is enabled for each port in the device’s hierarchy. ## OPTIONS -e, --endpoint Toggle from treating the port arguments as Switch Port identifiers to Endpoint Port identifiers. -m, --enable-memdevs Try to enable descendant memdevs after enabling the port. Recall that a memdev is only enabled after all CXL ports in its device topology ancestry are enabled. \--debug If the cxl tool was built with debug disabled, turn on debug messages. ## COPYRIGHT Copyright © 2016 - 2022, Intel Corporation. License GPLv2: GNU GPL version 2 . This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. ## SEE ALSO [cxl-disable-port(1)](https://docs.pmem.io/ndctl-user-guide/cxl-man-pages/cxl-disable-port-1) --- # Agent Instructions: Querying This Documentation If you need additional information that is not directly available in this page, you can query the documentation dynamically by asking a question. Perform an HTTP GET request on the current page URL with the `ask` query parameter: ``` GET https://docs.pmem.io/ndctl-user-guide/cxl-man-pages/cxl-enable-port-1.md?ask= ``` The question should be specific, self-contained, and written in natural language. The response will contain a direct answer to the question and relevant excerpts and sources from the documentation. Use this mechanism when the answer is not explicitly present in the current page, you need clarification or additional context, or you want to retrieve related documentation sections.