NDCTL User Guide
Introduction
ndctl
is a utility for managing the Linux LIBNVDIMM Kernel subsystem. It is designed to work with various non-volatile memory devices (NVDIMMs) from different vendors. The LIBNVDIMM subsystem defines a kernel device model and control message interface for platform NVDIMM resources like those defined by the ACPI v6.0 NFIT (NVDIMM Firmware Interface Table). The latest ACPI and UEFI specifications can be found at uefi.org. Operations supported by ndctl
include:
Provisioning capacity (namespaces)
Enumerating Devices
Enabling and Disabling NVDIMMs, Regions, and Namespaces
Managing NVDIMM Labels
What's new in v73
This release incorporates functionality up to the 5.17 kernel.
Highlights include full CXL topology walk and filtering in cxl-list, a new cxl-cli command to set memdev partitioning info, several unit test fixes, conversion of the build system to meson, smart error injection enhancements for 'papr' NVDIMMs, and RPM spec fixes to support config file migration, and flatpak builds.
Commands:
cxl-list: full topology walk and filtering
cxl-set-partition: new command to set memdev partitions
cxl{enable,disable}-port: new commands
cxl{enable,disable}-memdev: new commands
Tests:
Deprecate BLK aperture support
inject-smart.sh: increase tolerance for decimal formatted fields
APIs:
ndctl_dimm_refresh_flags
cxl_bus_get_ctx
cxl_bus_get_devname
cxl_bus_get_first
cxl_bus_get_id
cxl_bus_get_next
cxl_bus_get_port
cxl_bus_get_provider
cxl_cmd_identify_get_persistent_only_size
cxl_cmd_identify_get_total_size
cxl_cmd_identify_get_volatile_only_size
cxl_cmd_new_get_partition
cxl_cmd_new_set_partition
cxl_cmd_partition_get_active_persistent_size
cxl_cmd_partition_get_active_volatile_size
cxl_cmd_partition_get_next_persistent_size
cxl_cmd_partition_get_next_volatile_size
cxl_cmd_partition_set_mode
cxl_decoder_get_ctx
cxl_decoder_get_devname
cxl_decoder_get_first
cxl_decoder_get_id
cxl_decoder_get_next
cxl_decoder_get_nr_targets
cxl_decoder_get_port
cxl_decoder_get_resource
cxl_decoder_get_size
cxl_decoder_get_target_by_memdev
cxl_decoder_get_target_by_position
cxl_decoder_get_target_type
cxl_decoder_is_accelmem_capable
cxl_decoder_is_locked
cxl_decoder_is_mem_capable
cxl_decoder_is_pmem_capable
cxl_decoder_is_volatile_capable
cxl_dport_get_devname
cxl_dport_get_first
cxl_dport_get_id
cxl_dport_get_next
cxl_dport_get_physical_node
cxl_dport_get_port
cxl_dport_maps_memdev
cxl_endpoint_get_bus
cxl_endpoint_get_ctx
cxl_endpoint_get_devname
cxl_endpoint_get_first
cxl_endpoint_get_host
cxl_endpoint_get_id
cxl_endpoint_get_memdev
cxl_endpoint_get_next
cxl_endpoint_get_parent
cxl_endpoint_get_port
cxl_endpoint_is_enabled
cxl_memdev_disable_invalidate
cxl_memdev_enable
cxl_memdev_get_bus
cxl_memdev_get_endpoint
cxl_memdev_get_host
cxl_memdev_get_numa_node
cxl_memdev_get_serial
cxl_memdev_is_enabled
cxl_port_disable_invalidate
cxl_port_enable
cxl_port_get_bus
cxl_port_get_bus
cxl_port_get_ctx
cxl_port_get_devname
cxl_port_get_dport_by_memdev
cxl_port_get_first
cxl_port_get_host
cxl_port_get_id
cxl_port_get_next
cxl_port_get_next_all
cxl_port_get_nr_dports
cxl_port_get_parent
cxl_port_hosts_memdev
cxl_port_is_enabled
cxl_port_is_endpoint
cxl_port_is_root
cxl_port_is_switch
cxl_port_to_bus
cxl_port_to_endpoint
cxl_target_get_decoder
cxl_target_get_devname
cxl_target_get_first
cxl_target_get_id
cxl_target_get_next
cxl_target_get_physical_node
cxl_target_get_position
cxl_target_maps_memdev
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